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5.2.1 Channel Registers

5.2.1.4 Direct Input Register

This register provides the current state of the input signals.

Direct Input Register
Channel Offset
Read Only
76543210
$09F_Ua2F_Ua1F_DIF_INDUa2Ua1DIIND

F_Ua2
This bit is set when a non-differential input signal is detected on the Ua2 input. This bit will stay set until the Direct Input Register is read.

F_Ua1
This bit is set when a non-differential input signal is detected on the Ua1 input. This bit will stay set until the Direct Input Register is read.

F_DI
This bit is set when a non-differential input signal is detected on the digital input. This bit will stay set until the Direct Input Register is read.

F_IND
This bit is set when a non-differential input signal is detected on the index input. This bit will stay set until the Direct Input Register is read.

Ua2, Ua1
These bits directly reflect the state of the channel's quadrature signals.

DI
This bit directly reflects the state of the channel's digital input signal.

IND
This bit directly reflects the state of the channel's index input signal.


BI-0433 - 12 Channel Incremental Encoder Interface with Isolated Inputs and Cable Fault Detection - 23 MAY 1997 Copyright 1997 Brand Innovators B.V. [Next] [Previous] [Up] [Top] [Contents] [Back]